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Development and Simulation of the DARPA Nanocomputer Memory

Kwan S. Kwoka and James C. Ellenbogen*, b

aMicrosystems Technology Office, Defense Advanced Research Projects Office,
Arlington, VA 22203 USA

bNanosystems Group, The MITRE Corporation
McLean, VA 22102 USA

This is an abstract for a presentation given at the
10th Foresight Conference on Molecular Nanotechnology


In September 2004 the Moletronics Program of the U.S. Defense Advanced Research Projects Agency (DARPA) will deliver a functioning prototype electronic nanocomputer memory [1]. The 16 Kilobit memory will measure only a few micrometers on a side. It is presently being built from conductive molecular-scale electronic switches and wires integrated at an effective density of 1011 bits per square centimeter. These components are ten thousand times smaller and they are being integrated at least 100 times as densely as those that will be available in the conventional microcomputers of 2004. The speakers will provide an overview the five-year DARPA-sponsored research and development effort that will produce this ultra-dense nanocomputer subsystem. Further, they will describe the results of a summer 2002 effort at MITRE, Caltech, Harvard University, and at the Hewlett-Packard Corp. to simulate the performance of the architecture for DARPA's molecular electronic nanocomputer memory.


  1. K. Kwok and J. C. Ellenbogen, "Moletronics: Future Electronics," Materials Today, Vol. 5, No. 2, February 2002, pp. 28-37. A softcopy of this paper is available on the Internet at the URL:

Abstract in Microsoft Word® format 23,366 bytes

*Corresponding Address:
James C. Ellenbogen
Nanosystems Group, The MITRE Corporation
7515 Colshire Drive, Mailstop N230, McLean, VA 22102 USA
Phone: 703-883-5930 Fax: 703-883-5963


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